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FPGA-based Prototyping Methodology Manual
ISBN:
Paperback: 978-1-61730-004-2 (1-61730-004-7)
eBook: 978-1-61730-005-9 (1-61730-005-5)
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FPGA-based Prototyping Methodology Manual
Table of Contents
Chapter 1: Introduction: the challenge of system verification
Chapter 2: What can FPGA-based prototyping do for us?
Chapter 3: FPGA technology today: chips and tools
Chapter 4: Getting started
Chapter 5: Which platform? (1) build-your-own
Chapter 6: Which platform? (2) ready-made
Chapter 7: Getting the design ready for the prototype
Chapter 8: Partitioning and reconnecting
Chapter 9: Design-for-Prototyping
Chapter 10: IP and high-speed interface
Chapter 11: Bring up and debug: the prototype in the lab
Chapter 12: Breaking out of the lab: the prototype in the field
Chapter 13: Prototyping + Verification = The Best of Both Worlds
Chapter 14: The future of prototyping
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FPGA-based Prototyping Methodology Manual
Best Practices in Design-for-Prototyping
By Doug Amos, Austin Lesea and René Richter
This book collects the best practices FPGA-based Prototyping of SoC and ASIC devices into one place for the first time, drawing upon not only the authors’ own knowledge but also from leading practitioners worldwide in order to present a snapshot of best practices today and possibilities for the future.
The book is organized into chapters which appear in the same order as the tasks and decisions which are performed during an FPGA-based prototyping project. We start by analyzing the challenges and benefits of FPGA-based Prototyping and how they compare to other prototyping methods. We present the current state of the available FPGA technology and tools and how to get started on a project. The FPMM also compares between home-made and outsourced FPGA platforms and how to analyze which will best meet the needs of a given project. The central chapters deal with implementing an SoC design in FPGA technology including clocking, conversion of memory, partitioning, multiplexing and handling IP amongst many other subjects. The important subject of bringing up the design on the FPGA boards is covered next, including the introduction of the real design into the board, running embedded software upon it in and debugging and iterating in a lab environment. Finally we explore how the FPGA-based Prototype can be linked into other verification methodologies, including RTL simulation and virtual models in SystemC.
Along the way, the reader will discover that an adoption of FPGA-based Prototyping from the beginning of a project, and an approach we call Design-for-Prototyping, will greatly increase the success of the prototype and the whole SoC project, especially the embedded software portion. Design-for-Prototyping is introduced and explained and promoted as a manifesto for better SoC design.
Readers can approach the subjects from a number of directions. Some will be experienced with many of the tasks involved in FPGA-based Prototyping but are looking for new insights and ideas; others will be relatively new to the subject but experienced in other verification methodologies; still others may be project leaders who need to understand if and how the benefits of FPGA-based prototyping apply to their next SoC project. We have tried to make each subject chapter relatively standalone, or where necessary, make numerous forward and backward references between subjects, and provide recaps of certain key subjects.
We hope you like the book and we look forward to seeing you on the FPMM on-line community soon (go to www.synopsys.com/fpmm).
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| About the Authors |
Doug AmosDoug Amos - Synopsys, Inc. Doug gained an honors degree in Electrical and Electronic Engineering from the University of Bath, England in 1980.
He did his first programmable logic design in the mid-80’s, when FPGAs were still called Logic Cell Arrays. Since then, Doug has designed or supported countless FPGA and ASIC designs either as an independent consultant or working with the leading vendors. Doug became Synplicity’s first engineer and Technical Director in Europe (Synplicity was acquired by Synopsys in 2008) and has presented widely on FPGA design and FPGA-based prototyping since that time.
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| About the Executive Editor |
Austin LeseaAustin Lesea - Xilinx, Inc. Austin graduated from UC Berkeley in 1974 with his BS EECS in Electromagnetic (E&M) Theory and in 1975 added an MS EECS in Communications and Information Theory.
He has worked in the telecommunications field for 20 years designing optical, microwave, and copper- based transmission system and developing SONET/SDH GPS-based Timing Systems. For the last ten years at Xilinx, Austin was in the IC Design department for the Virtex product line and for the last two years, he has been working for Xilinx Research Labs, where he is looking beyond the present technology issues.
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René Richter René Richteris - Synopsys, Inc. René holds an MSEE degree, the Dipl.-Ing. der Elektrotechnik, from the Chemnitz University of Technology in Germany in 1999.
He has worked 11 years in the area of FPGA-based Prototyping, first at ISYTEC, then Pro Design and now at Synopsys; each transition as a result of an acquisition. René managed the development of the CHIPit hardware platforms before moving on to become Director of Applications. During this time he developed co-simulation interfaces and prototyping hardware and has implemented many ASIC designs in FPGA. René has also developed prototyping concepts and solutions for customers and he is one of the inventors of the UMRBus and CHIPit product line.
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